Logic analyzer

A logic analyzer displays signals in a digital circuit that are too fast to be observed by a
human being and presents it to a user so that the user can more easily check correct
operation of the digital system. Logic analyzers are typically used for capturing data in
systems that have too many channels to be examined with an oscilloscope. Software
running on the logic analyzer can convert the captured data into timing diagrams,
protocol decodes, state machine traces, assembly, or correlate assembly with source-level
software.


Current analyzers are either mainframes, which consist of a chassis containing the
display, controls, control computer, and multiple slots into which the actual data
capturing hardware is installed, or standalone units which integrate everything into a
single package, with options installed at the factory. Recent mainframe models include
the Agilent 16900 and Tek TLA7000, and recent standalone models include the Agilent
16800-series and Tek TLA5000.


A logic analyzer can trigger on a complicated sequence of digital events, and then capture
a large amount of digital data from the system under test (SUT). The best logic analyzers
behave like software debuggers by showing the flow of the computer program and
decoding protocols to show messages and violations.When logic analyzers first came into use, it was common to attach several hundred “clips” to a digital system. Later, specialized connectors came into use. The evolution of logic analyzer probes has led to a common footprint that multiple vendors support, which provides added freedom to end users. Since 2004, connectorless technology, known as Soft Touch, has become popular. These probes provide a durable, reliable mechanical and electrical connection between the probe and the circuit board with less than 0.7 pF loading per signal.

Once the probes are connected, the user programs the analyzer with the names of each
signal, and can group several signals into groups for easier manipulation. Next, a capture
mode is chosen, either timing mode, where the input signals are sampled at regular
intervals based on an internal or external clock source, or state mode, where one or more
of the signals are defined as “clocks,” and data is taken on the rising or falling edges of
these clocks, optionally using other signals to qualify these clocks. At this point, the user sets the analyzer to “run” mode, either triggering once, or repeatedly triggering.