Reconfigurable computing

Reconfigurable computing is computer processing with highly flexible computing
fabrics. The principal difference when compared to using ordinary microprocessors is the
ability to make substantial changes to the data path itself in addition to the control flow.
The concept of reconfigurable computing has been around since the 1960s, when Gerald
Estrin’s landmark paper proposed the concept of a computer consisting of a standard
processor and an array of “reconfigurable” hardware. The main processor would control
the behavior of the reconfigurable hardware. The reconfigurable hardware would then be
tailored to perform a specific task, such as image processing or pattern matching, as
quickly as a dedicated piece of hardware.


In the last decade there was a renaissance in this area of research with many proposed
reconfigurable architectures developed both in industry and academia such as, Matrix,
Garp, Elixent, XPP, Silicon Hive, Montium, Pleiades, Morphosys, PiCoGA. Such designs
were feasible due to the relentless progress of silicon technology that allowed complex
designs to be implemented on a single chip. The world’s first commercial reconfigurable
computer, the Algotronix CHS2X4, was completed in 1991. It was not a commercial
success, but it was promising enough that Xilinx Inc. (the inventor of the Field-
Programmable Gate Array (FPGA)) purchased the technology and hired the Algotronix
staff .

Currently there are a number of vendors with commercially available reconfigurable
computers aimed at the high performance computing market; including Cray, SGI and
SRC Computers, Inc. . Cray supercomputer company (not affiliated with SRC
Computers) acquired OctigaBay and its reconfigurable computing platform, which Cray
marketed as the XD1 until recently. SGI sells the RASC platform with their Altix series
of supercomputers. SRC Computers, Inc. has developed a family of reconfigurable
computers based on their IMPLICIT+EXPLICIT architecture and MAP processor.



All of the offerings are hybrid “Estrin” computers with traditional microprocessors
coupled to user-programmable FPGAs. The systems can be used as traditional cluster
computers without using the FPGAs (in fact, the FPGAs are an option on the XD1 and
the SGI RASC). The XD1 and SGI FPGA reconfiguration is accomplished either via the
traditional Hardware Description Languages (HDL) or using a high level languages like
the graphical tool Starbridge Viva or C-like languages like for example Handel-C from
Celoxica, Impulse-C from Impulse Accelerated Technologies or Mitrion-C from
Mitrionics. According to the XD1 programming guide, “Development of the raw FPGA
logic file is a complex process that requires specialized knowledge and tools.”